The European-based Pullnano project is currently working on developing chip features as small as 22nm.

But a point will inevitably be reached when it is simply no longer economically feasible to continue to reduce the minimum feature size to make space for more transistors. Gilles Thomas, the director of R&D Cooperative Programs at STMicroelectronics in Crolles, France, describes this point as the semiconductor industry’s “million-dollar question.” He estimates that it will probably be around the 16nm or 11nm mark.